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fixed example code

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Patrick 2024-11-24 22:09:36 +01:00
parent 81fd536150
commit 96c17117cd
2 changed files with 4 additions and 5 deletions
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4
src/assembler.rs
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@ -38,11 +38,11 @@ impl<T: Clone + ToString + FromStr> Assembler<T> {
.unwrap() .unwrap()
.split(source) // split by regex .split(source) // split by regex
.filter(|s: &&str| !s.is_empty()) // remove empty entries .filter(|s: &&str| !s.is_empty()) // remove empty entries
.map(|s| match map.get(&s.to_lowercase()) { .map(|s: &str| match map.get(&s.to_lowercase()) {
Some(opcode) => opcode.to_string(), Some(opcode) => opcode.to_string(),
None => s.to_string(), None => s.to_string(),
}) // converts opcode strings to numbers }) // converts opcode strings to numbers
.filter_map(|s| { .filter_map(|s: String| {
if s.starts_with("0x") { if s.starts_with("0x") {
// converts hexadecimals to decimal, then parses them // converts hexadecimals to decimal, then parses them
u128::from_str_radix(&s[2..], 16) u128::from_str_radix(&s[2..], 16)

5
src/main.rs
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@ -17,7 +17,6 @@ fn main() {
let final_result: Vec<u8> = assembler.assemble(&mut "nop 0x00 0x22".to_string()); let final_result: Vec<u8> = assembler.assemble(&mut "nop 0x00 0x22".to_string());
dbg!(final_result); dbg!(final_result);
// let mut instance: cpu::ExampleCPU = cpu::ExampleCPU::create_instance(true, [0; 256]); let mut instance: cpu::ExampleCPU = cpu::ExampleCPU::create(false, [0; 256]);
// change the instructions here instance.start();
// instance.start_emulation();
} }