diff --git a/src/assembler.rs b/src/assembler.rs index 937e763..5ea4046 100644 --- a/src/assembler.rs +++ b/src/assembler.rs @@ -38,11 +38,11 @@ impl Assembler { .unwrap() .split(source) // split by regex .filter(|s: &&str| !s.is_empty()) // remove empty entries - .map(|s| match map.get(&s.to_lowercase()) { + .map(|s: &str| match map.get(&s.to_lowercase()) { Some(opcode) => opcode.to_string(), None => s.to_string(), }) // converts opcode strings to numbers - .filter_map(|s| { + .filter_map(|s: String| { if s.starts_with("0x") { // converts hexadecimals to decimal, then parses them u128::from_str_radix(&s[2..], 16) diff --git a/src/main.rs b/src/main.rs index 670410e..f0eec72 100644 --- a/src/main.rs +++ b/src/main.rs @@ -17,7 +17,6 @@ fn main() { let final_result: Vec = assembler.assemble(&mut "nop 0x00 0x22".to_string()); dbg!(final_result); - // let mut instance: cpu::ExampleCPU = cpu::ExampleCPU::create_instance(true, [0; 256]); - // change the instructions here - // instance.start_emulation(); + let mut instance: cpu::ExampleCPU = cpu::ExampleCPU::create(false, [0; 256]); + instance.start(); }